SMBus (System Management Bus)

Category: science

A low-speed two-wire bus protocol used to communicate lightweight status logs between motherboard components.

Derived from the I2C standard, the SMBus routes vital hardware logs across the board. It connects the CPU to the memory SPD chips, temperature sensors, fan controllers, and smart battery microchips. A single shorted component on this bus can freeze the whole communication line, causing a no-POST state.

Common Examples

• We used an oscilloscope to verify data packets on the SMBus line, tracking a data lock down to a bad temperature sensor chip.
• The SMBus clock and data lines require pull-up resistors to keep the signal bus logic high during idle state intervals.